1. Field of the Invention
The present invention relates to an instruction code compression method in a computer, and an instruction fetch circuit which is capable of reading an instruction code after compression and supplying the read instruction code to an instruction decoder.
2. Description of the Related Art
With the recent increase in scale of system software, there are many cases wherein the area of a memory storing software is larger than that of a CPU (Central Processing Unit). Under such a situation, it is important to reduce power consumption of the memory, in addition to limiting power consumption of the CPU. In particular, as access to a memory storing instruction codes frequently occurs during execution of applications/programs, it is desirable to reduce the number of accesses.
In a conventional CPU, it is common that an instruction code fetched from a memory is directly decoded by an instruction decoder, or is decoded by the instruction decoder after being stored in an instruction register for subsequent execution. In this case, since the instruction code used once in the instruction register is always overwritten by a next instruction code, a new instruction code is required to be read from the memory, and accordingly, power consumption by an access to the memory can be reduced. In addition, since power consumption required for one access is increased if the size of memory is increased, there arises a problem when increasing the size of software.
Japanese Patent Application Publication No. 2004-259234 discloses a program code compression/decompression method in which program codes are compressed and stored in a memory by commonization of a condition code part of “regular execution” in an instruction execution condition designating part of an instruction code for RISC (Reduced Instruction Set Computer), and for execution. The compressed program codes are read from the memory and are deployed. The program code compression/decompression method disclosed in Japanese Patent Application Publication No. 2004-259234 can reduce required memory capacity by compressing the program codes. However, when the compressed program codes are read and deployed into the original instruction codes, since the number of accesses when a head instruction is read for each block of the compressed program codes increases by one, problems such as increased execution time for reading and increased power consumption become apparent. In addition, since only the upper 4 bits of program codes can be compressed, another problem is that reduction in memory capacity of up to only about 10% at the most can be realized.